An MSB-First Asynchronous Add-Compare-Select Unit
碩士 === 國立臺灣大學 === 電子工程學研究所 === 97 === As the advance in the technology, chips have become larger and larger, and it becomes more difficult for synchronous design, particularly as clocks get faster. The problems of clock distribution and clock skew minimization are becoming increasingly significant a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/05911835389049455440 |