VLSI Architecture Design of Low Complicated Parallel Turbo Decoder
碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 97 === Excellent error correction capability and near Shannon limiting performance make turbo code to be the most important error correcting code recently. However, turbo decoder uses enormous calculations and iterations, which is difficult to be implemented and has...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/c4w626 |