Design and Implementation of A CMOS MEMS Sigma-Delta Capacitive Micro-accelerometer

碩士 === 國立中正大學 === 電機工程所 === 98 === Recently, due to the rapid development of Micro-electro-mechanical System, humans’ lives are much related to this field. Besides, due to the development of CMOS process, designers can combine micro-machined inertial sensors with circuits in a chip, and the advantag...

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Bibliographic Details
Main Authors: Yong-Ming Lin, 林勇銘
Other Authors: Shuenn-Yuh Lee
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/89735945688134106568
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Summary:碩士 === 國立中正大學 === 電機工程所 === 98 === Recently, due to the rapid development of Micro-electro-mechanical System, humans’ lives are much related to this field. Besides, due to the development of CMOS process, designers can combine micro-machined inertial sensors with circuits in a chip, and the advantages of CMOS MEMS will be shown. This paper proposed a close-loop, second-order micro-electro-mechanical sigma-delta modulator. In this chip, the micro-structure is an accelerometer. By translating the different energy type, the acceleration can be translated into voltage signal which can be sensed by the circuits. In order to realize this chip, the post process flow of micro-machined sensor and every parameter should be considered first. Furthermore, the mechanical noise and the circuits’ noise should also be concerned. In addition to the analyses which are mentioned above, in order to increase the reliability of the sensor part, we also considered the residue stress in the micro-structure, and overcome this problem in the design. When the analysis and design of the micro-structure part are finished, the required sensing circuits will be implemented. There are a lot of non-ideal effects in circuit design. These non-ideal effects will dominate the system performance and the specifications of the operation amplifier. Therefore, the simulation environments of the non-ideal effects should be built so that the specifications of the operation amplifier can be obtained. Finally, a stable system can be realized. This chip is fabricated in the TSMC 0.35μm 2P4M Standard CMOS Process, with the post process provided by the Nation Chip Implementation Center (CIC). The sense range of the micro-structure is between ±3.02g, and the sensitivity of this micro-structure is 3.812mV/g;Forthermore, the system’s signal-to-noise-distortion ratio is 61.2845dB and the dynamic range is 67dB with an input frequency of 1024Hz under sampling frequency of 2MHz. The total chip area is 2.18 x 2.18 mm2 and the power consumption is 9.3mW.