Design and Implementation of an Interleaved Series Buck Converter with Low Output Current Ripple

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 98 === In this thesis, the design and implementation of an interleaved series buck converter with low output current ripple is presented. The converter is constructed by two series step-down converters to acquire high-step-down conversion ratio. The voltage transfer...

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Bibliographic Details
Main Authors: Cai-YangKo, 柯家揚
Other Authors: Tsorng-Juu Liang
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/63141022892125138802