Warpage Modeling of Electronic Package During the Post-Mold Curing Process

• Main Authors: Hong-WeiHuang, 黃鴻瑋
• Other Authors: Tz-Cheng Chiu
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/04042633982347789635

碩士 === 國立成功大學 === 機械工程學系碩博士班 === 98 === Warpage is one of the most critical issues in electronic industry, it has strong implication on the board reflow assembly yields for area-array packages, excessive warpage may lead to difficulties of electrical interconnection. Package warpage typically occurs after the post-mold curing process partically due to the CTE mismatch among various packaging constituents such as silicon die, molding compound and multilayer substrate. In addition, during the packaging processes the molding compound curing shrinkage, physical and chemical aging would occur. These processes and the curing-dependent viscoelastic behavior would affect molding compound thermomechanical and metric properties. In order to accurately predicting the warpage and stress in IC packages, it is critical to develop a cure-time-temperature dependent model and chemical aging model for describing the constitutive behavior of molding compound. In this thesis, the experimental characterizations for developing the models for curing and chemical aging effects, and the viscoelastic constitutive behavior of organic substrate are presented. By using these models, finite element analysis are conducted to simulate the warpage evolution during post-mold curing process. Shadow Moir? experiments are also conducted to measure package warpage and compared to the simulation results.