A 10-bit Successive Approximation ADC

碩士 === 國立暨南國際大學 === 電機工程學系 === 98 === Propose a fully differentially successive approximation ADC with a binary-weighted capacitor array networks. Add bootstrapped switches to accelerate charging to the capacitor networks in front of this architecture, and decrease the settling time of capacitor arr...

Full description

Bibliographic Details
Main Authors: Hong-Yi Chung, 鐘鴻儀
Other Authors: Chih-Wen Lu
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/57183272659084856815