A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay

碩士 === 國立交通大學 === 電機學院IC設計產業專班 === 98 === As the complexity of the semiconductor device continues to explode, the EDA tool performance and IC design flows are necessary to address all nanometer issues. Buffer insertion is the state-of-the-art technology, which is used to improve the performance of t...

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Main Authors:	Wu, Kuo-Fu, 吳國富
Other Authors:	Lee, Yu-Min
Format:	Others
Language:	en_US
Published:	2010
Online Access:	http://ndltd.ncl.edu.tw/handle/vyb8pu

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spelling	ndltd-TW-098NCTU53340072019-05-15T20:33:26Z http://ndltd.ncl.edu.tw/handle/vyb8pu A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay 一個使用緩衝器插入且考量連線延遲的單源扇出最佳化 Wu, Kuo-Fu 吳國富碩士國立交通大學電機學院IC設計產業專班 98 As the complexity of the semiconductor device continues to explode, the EDA tool performance and IC design flows are necessary to address all nanometer issues. Buffer insertion is the state-of-the-art technology, which is used to improve the performance of the timing issue. Fanout optimization is a fundamental problem in timing optimization. In this thesis, considering the interconnect delay , we will adopt the buffer insertion technique to solve the single source fanout optimization problem. Lee, Yu-Min 李育民 2010 學位論文 ; thesis 42 en_US
collection	NDLTD
language	en_US
format	Others
sources	NDLTD
description	碩士 === 國立交通大學 === 電機學院IC設計產業專班 === 98 === As the complexity of the semiconductor device continues to explode, the EDA tool performance and IC design flows are necessary to address all nanometer issues. Buffer insertion is the state-of-the-art technology, which is used to improve the performance of the timing issue. Fanout optimization is a fundamental problem in timing optimization. In this thesis, considering the interconnect delay , we will adopt the buffer insertion technique to solve the single source fanout optimization problem.
author2	Lee, Yu-Min
author_facet	Lee, Yu-Min Wu, Kuo-Fu 吳國富
author	Wu, Kuo-Fu 吳國富
spellingShingle	Wu, Kuo-Fu 吳國富 A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay
author_sort	Wu, Kuo-Fu
title	A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay
title_short	A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay
title_full	A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay
title_fullStr	A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay
title_full_unstemmed	A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay
title_sort	single source fanout optimization using buffer insertion considering interconnect delay
publishDate	2010
url	http://ndltd.ncl.edu.tw/handle/vyb8pu
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A Single Source Fanout Optimization Using Buffer Insertion Considering Interconnect Delay

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