Improvement of the Si substrate backside exposure problem

碩士 === 國立交通大學 === 工學院碩士在職專班半導體材料與製程設備組 === 98 === The dominate goal of the study is to solve concave problem in wafer backside for some DRAM product. Some serious wafers were scrapped due to damage silicon substrate. The DRAM products with many different type due to often design process flow by diff...

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Main Authors: Chen, Chen-Hsing, 陳振興
Other Authors: Chang, Y. Edward
Format: Others
Language:zh-TW
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/21723195843777528798
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spelling ndltd-TW-098NCTU56860022015-10-13T15:42:34Z http://ndltd.ncl.edu.tw/handle/21723195843777528798 Improvement of the Si substrate backside exposure problem DRAM產品晶背矽基材裸露問題改善之探討 Chen, Chen-Hsing 陳振興 碩士 國立交通大學 工學院碩士在職專班半導體材料與製程設備組 98 The dominate goal of the study is to solve concave problem in wafer backside for some DRAM product. Some serious wafers were scrapped due to damage silicon substrate. The DRAM products with many different type due to often design process flow by different critical dimension. The potential problems of design will appear one after another when mass production. According to running history of impact wafers to analysis & find out common issue. Get robot catch wafer position data of relation machine to correlate with impact wafer pattern, try to find out impact machine type & layers by microscope, SEM measurement tool. We change parameter, try to find out the key point & borrow tool from ERSO to measure boat pin roughness to confirm. We found out there are some problem in design process flow, possible induce wafer abnormal even scrap for seriously in the experiment. We provide very important suggestion at process flow designing in semiconductor. To improve wafer yield, get big contribution in company. Chang, Y. Edward 張翼 2009 學位論文 ; thesis 66 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立交通大學 === 工學院碩士在職專班半導體材料與製程設備組 === 98 === The dominate goal of the study is to solve concave problem in wafer backside for some DRAM product. Some serious wafers were scrapped due to damage silicon substrate. The DRAM products with many different type due to often design process flow by different critical dimension. The potential problems of design will appear one after another when mass production. According to running history of impact wafers to analysis & find out common issue. Get robot catch wafer position data of relation machine to correlate with impact wafer pattern, try to find out impact machine type & layers by microscope, SEM measurement tool. We change parameter, try to find out the key point & borrow tool from ERSO to measure boat pin roughness to confirm. We found out there are some problem in design process flow, possible induce wafer abnormal even scrap for seriously in the experiment. We provide very important suggestion at process flow designing in semiconductor. To improve wafer yield, get big contribution in company.
author2 Chang, Y. Edward
author_facet Chang, Y. Edward
Chen, Chen-Hsing
陳振興
author Chen, Chen-Hsing
陳振興
spellingShingle Chen, Chen-Hsing
陳振興
Improvement of the Si substrate backside exposure problem
author_sort Chen, Chen-Hsing
title Improvement of the Si substrate backside exposure problem
title_short Improvement of the Si substrate backside exposure problem
title_full Improvement of the Si substrate backside exposure problem
title_fullStr Improvement of the Si substrate backside exposure problem
title_full_unstemmed Improvement of the Si substrate backside exposure problem
title_sort improvement of the si substrate backside exposure problem
publishDate 2009
url http://ndltd.ncl.edu.tw/handle/21723195843777528798
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