Characteristics of a New Trench Oxide Layer Polysilicon Thin-Film Transistor and its 1T-DRAM Applications

• Main Authors: Hsien-Nan Chiu, 邱憲楠
• Other Authors: Jyi-Tsong Lin
• Format: Others
• Language: zh-TW
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/62184136431112541817

碩士 === 國立中山大學 === 電機工程學系研究所 === 98 === In this thesis, we propose a simple trench oxide layer polysilicon thin-film Transistor (TO TFT) process and the self-heating effects can be significantly reduced because of its structural advantages. According to the ISE-TCAD simulation results, our proposed TO TFT structure has novel features as follows: 1. The buried oxide and the isolation oxide are carried out simultaneously in order to achieve a goal of simple process. 2. The trench design is used to improve both the sensing current windows (~ 84%) and the retention time (~ 57%). 3. The thermal stability is drastically improved by its naturally formed source/drain tie. The above mentioned features help our proposed device structure to demonstrate the desired characteristics that are better than that of a conventional TFT. Additionally, the thermal instability is drastically improved which is good for long-term device operation.