Circuit Design of LDPC Decoder for IEEE 802.16e Standard
碩士 === 國立中山大學 === 電機工程學系研究所 === 98 === In this thesis, a multi-rate LDPC (Low-Density Parity-Check code) decoder circuit is proposed for IEEE 802.16e standard. In the proposed circuit, we modify the overlapping structure for different code rate of the LDPC decoder to enhance the hardware utilization...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2010
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Online Access: | http://ndltd.ncl.edu.tw/handle/48997205259794652311 |