Circuit Design of LDPC Decoder for IEEE 802.16e Standard

碩士 === 國立中山大學 === 電機工程學系研究所 === 98 === In this thesis, a multi-rate LDPC (Low-Density Parity-Check code) decoder circuit is proposed for IEEE 802.16e standard. In the proposed circuit, we modify the overlapping structure for different code rate of the LDPC decoder to enhance the hardware utilization...

Full description

Bibliographic Details
Main Authors: Cheng-Ho Chen, 陳正和
Other Authors: none
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/48997205259794652311