New Architectures of ECO Cell, Thermal Sensor and Power Network for IC Design
博士 === 國立清華大學 === 資訊工程學系 === 98 === As feature size of MOS technology continues to shrink into nano-scale, power density becomes a critical issue for transistor scaling. When power density reaches hundreds of watt per centimeter square, power noise challenges 2D chips or even 3D chips to design a re...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/23918684698399588658 |