A Closed-Loop Gain-Error Self-Calibration Technique for Pipelined ADCs
碩士 === 臺灣大學 === 電子工程學研究所 === 98 === This thesis presents a closed-loop gain-error self-calibration technique for pipelined ADCs, and the proposed calibration method is used in a 1.2V 10-bit pipelined ADC. The proposed pipelined ADC is design in TSMC 90nm CMOS process. A two-stage operational amplifi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/56108445819635392262 |