Transmission Line Based CMOS Low-Power Consumption Low-Noise Amplifier and Variable Delay Line in K-Band
碩士 === 臺灣大學 === 電信工程學研究所 === 98 === There are two parts in this thesis, one is a 24 GHz low-power consumption low-noise amplifier with miniaturized size in 0.18 μm CMOS process, and the other is a 24 GHz monolithic variable delay line and two delay lines with loss compensation in 0.13 μm CMOS proc...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/29037054906384478287 |