Set-Based Management Scheme for MLC Flash Memory

碩士 === 國立臺灣科技大學 === 資訊工程系 === 98 === NAND flash memory has been widely adopted as storage media in consumer electronics and portable devices due to its shock resistance, high density, low cost, low power consumption, non-volatility, and low access latency natures. It is also a good alternative for h...

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Main Authors: Yu-Cheng Zheng, 鄭育丞
Other Authors: Jen-Wei Hsieh
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/77601602956060656494
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spelling ndltd-TW-098NTUS53920542016-04-22T04:23:47Z http://ndltd.ncl.edu.tw/handle/77601602956060656494 Set-Based Management Scheme for MLC Flash Memory 以集合為基礎之多層單元快閃記憶體管理機制 Yu-Cheng Zheng 鄭育丞 碩士 國立臺灣科技大學 資訊工程系 98 NAND flash memory has been widely adopted as storage media in consumer electronics and portable devices due to its shock resistance, high density, low cost, low power consumption, non-volatility, and low access latency natures. It is also a good alternative for hard disk drives. NAND flash memory could be classified into Single-Level Cell (SLC) and Multi-Level Cell (MLC). SLC is the earlier design of flash memory and could store 1 bit per cell. A numerous excellent management schemes have been proposed for SLC. In recent years, MLC, which stores 2 bits per cell, has gradually replaced SLC due to its lower cost and higher density. However, MLC also brings new constraints, i.e., no partial programming and sequential page writes within a block, to the management. This paper proposes a novel mapping scheme for MLC. The goals of our research are to avoid time out by decreasing dummy page writes, to get a better response time by decreasing live page copying, and to prolong the life span of flash memory by decreasing block erasures. Our trace-driven simulation show that the proposed set-based scheme could reduce the amount of dummy page writes/live page copying/block erasures by up to 90%/52%/83%, compared with current hybrid-level mapping schemes. Jen-Wei Hsieh 謝仁偉 2010 學位論文 ; thesis 56 en_US
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description 碩士 === 國立臺灣科技大學 === 資訊工程系 === 98 === NAND flash memory has been widely adopted as storage media in consumer electronics and portable devices due to its shock resistance, high density, low cost, low power consumption, non-volatility, and low access latency natures. It is also a good alternative for hard disk drives. NAND flash memory could be classified into Single-Level Cell (SLC) and Multi-Level Cell (MLC). SLC is the earlier design of flash memory and could store 1 bit per cell. A numerous excellent management schemes have been proposed for SLC. In recent years, MLC, which stores 2 bits per cell, has gradually replaced SLC due to its lower cost and higher density. However, MLC also brings new constraints, i.e., no partial programming and sequential page writes within a block, to the management. This paper proposes a novel mapping scheme for MLC. The goals of our research are to avoid time out by decreasing dummy page writes, to get a better response time by decreasing live page copying, and to prolong the life span of flash memory by decreasing block erasures. Our trace-driven simulation show that the proposed set-based scheme could reduce the amount of dummy page writes/live page copying/block erasures by up to 90%/52%/83%, compared with current hybrid-level mapping schemes.
author2 Jen-Wei Hsieh
author_facet Jen-Wei Hsieh
Yu-Cheng Zheng
鄭育丞
author Yu-Cheng Zheng
鄭育丞
spellingShingle Yu-Cheng Zheng
鄭育丞
Set-Based Management Scheme for MLC Flash Memory
author_sort Yu-Cheng Zheng
title Set-Based Management Scheme for MLC Flash Memory
title_short Set-Based Management Scheme for MLC Flash Memory
title_full Set-Based Management Scheme for MLC Flash Memory
title_fullStr Set-Based Management Scheme for MLC Flash Memory
title_full_unstemmed Set-Based Management Scheme for MLC Flash Memory
title_sort set-based management scheme for mlc flash memory
publishDate 2010
url http://ndltd.ncl.edu.tw/handle/77601602956060656494
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