| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 98 === Microcrystalline silicon thin-film-transistors (μC-Si TFTs) have been widely studied. Due to better device characteristic, and large area growth using a lower temperature process, compared to amorphous silicon thin-film-transistors, it has larger electron field mobility and lower energy band gap. Recently, it has been believed can substitute for the a-Si:H TFTs on large substrate area liquid crystal displays application status. However, μC-Si TFTs has some unavoidable problems, such as, large leakage current, non-uniform on fabrication, and worse device characteristic than polycrystalline silicon TFTs. For the improvement of device characteristic and the process simplification for μC-Si TFTs, in this thesis, μC-Si TFTs formed by using self-aligned silicided scheme and top gate staggered-type μC-Si TFTs structure have been studied, respectively.
In this thesis, μC-Si TFTs were examined by device simulation. First, the self aligned silicided scheme μC-Si TFTs are discussed. As compared to the previous top-gate staggered structure, the self-aligned silicided scheme leads to larger bending of energy band near the source region, which facilitates causing more carriers tunneling. In addition, for the top-gate staggered structure, since the source/drain electrode is spaced from the surface channel layer, the parasitic series resistance between the electrode and surface channel layer is considerably caused. As a result, the self-aligned silicided scheme can cause a larger conduction current than the top-gate staggered structure. Following, the silicide thickness of self aligned silicided scheme is changed, to study its influence to device characteristic.
Second, top gate staggered type μC-Si TFTs with difference channel layer thicknesses are discussed. It is found that, for a given electrode thickness, a proper channel layer thickness should be chosen to achieve better device characteristic. Finally, as compared with single electrode metal, the stacked electrode can achieve a better trade-off between nmos and pmos driving current.
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