Minimization of Output Voltage Ripple for Fully-Digitalized Interleaved Buck Converter with Active Clamp
碩士 === 國立臺北科技大學 === 電機工程系研究所 === 98 === In this thesis, a control technique combining pulse width modulation (PWM) and pulse amplitude modulation (PAM) is presented so as to make the output voltage ripple of the converter reduced as minimum as possible. Such a converter takes two-stage structure. Th...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/25g5bu |