A Filling Methodology for Efficient Compaction of Test Responses with Unknowns.

碩士 === 淡江大學 === 電機工程學系碩士在職專班 === 98 === Reducing test application time and test data volume are major cost factor in SoC design. Currently, scan-based testing is widely adopted on SoC test, a large number of scan cells coupled with a large number of scan patterns have inflated test data volume and t...

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Bibliographic Details
Main Authors: Chih-Ping Su, 蘇志平
Other Authors: Jiann-Chyi Rau
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/64068298656398651689
Description
Summary:碩士 === 淡江大學 === 電機工程學系碩士在職專班 === 98 === Reducing test application time and test data volume are major cost factor in SoC design. Currently, scan-based testing is widely adopted on SoC test, a large number of scan cells coupled with a large number of scan patterns have inflated test data volume and test application time. To reduce the test cost, test data compression solutions are used. In general solution, a few number of scan-in channels drive a large number of internal scan chains through decompressor, while the responses collected from the internal scan chains are taken through compactor that drives a few number of scan-out channels. There are many unknown x-bits are generated and collected into compactor after testing, it will be increased the test time and difficulty that the ATE (Automatic Test Equipment) judges. In this paper, we propose a method to fill fixed value into these unknown x-bits of internal scan chains output and then output to compactor. The method is performed prefix aim at the test data of internal scan chains output and then utilize ATE vector repeat function to compress the test data reducing the test data volume that stored in the ATE vector memory.