USE FPGA TO DESIGN THE ALL DIGITAL PHASE-LOCKED LOOP CIRCUITS
碩士 === 大同大學 === 電機工程學系(所) === 98 === The phase- locked loop (PLL) has been widely used in different field such as computer, consumer electronics, and communication , etc. We have to overcome many complicated problems to integrate a analog PLL into the single chip system full of noise. The sensitiv...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/47666718473594873911 |