A Load Balance Congestion-Awareness Scheme for Networks-on-Chip
碩士 === 雲林科技大學 === 資訊工程研究所 === 98 === With an increase in the number of transistors on-chip, the complexity of the system also increases. In order to cope with the growing interconnection infrastructure, the Networks-on-chip (NOC) concept was introduced. The performance of NoC depends on the underlyi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/92586056518042696005 |