Logic Synthesis for Hybrid LUT/SOP Reconfigurable Design Style
碩士 === 元智大學 === 資訊工程學系 === 98 === We propose a new hybrid FPGA architecture with both the SOP-cell and 4-input LUT to improve logic utilization of pure LUT and pure macro-cell architectures. The SOP-cell is composed of 5 NAND4 gates with smaller logic delay and transistor count as compared to LUT an...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/76392191268112395986 |