Maintaining Performance On Power Gating of Microprocessor Functional Units by Using a Predictive Pre-Wakeup Strategy
博士 === 國立中正大學 === 電機工程研究所 === 99 === Power gating is an effective technique for reducing leakage power in deep sub-micron CMOS technology. Microarchitectural techniques for power gating of functional units have been developed by detecting suitable idle regions and turning them off to reduce leakage...
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/74998851946124827757 |