Design of Parallel Decimal Adders
碩士 === 輔仁大學 === 電機工程學系 === 99 === Dedicated hardware for decimal floating point arithmetic is becoming a necessity in commercial and financial applications which demand high speed decimal computation. Multi-operand decimal addition is important to the implementation of other operations such as multi...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2011
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Online Access: | http://ndltd.ncl.edu.tw/handle/25222140517467933942 |