A 10-bit Single End Successive Approximation Register ADC With Binary-weighted Capacitor Architecture
碩士 === 國立中興大學 === 電機工程學系所 === 99 ===
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/x2awww |