Parallel Adder Design Based on Binary Signed-Digit Representation
碩士 === 國立勤益科技大學 === 電子工程系 === 99 === In this thesis, we propose a completely parallel adder design based on BSD (Binary Signed-Digit) representation. The binary signed-digit number representation has inherently carry-free property. Therefore, binary signed-digit number representation is widely used...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/79158682409003906822 |