iLap: Iterative Layer-Aware Partitioning Algorithm for Through-Silicon Via Minimization in 3D ICs
碩士 === 國立交通大學 === 電子研究所 === 99 === As compared with two-dimensional (2D) ICs, three-dimensional (3D) integration is a breakthrough technology of growing importance that has the potential to offer significant performance and functional benefits. This emerging technology allows stacking multiple layer...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/55352605558170621990 |