Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing
碩士 === 國立交通大學 === 電子研究所 === 99 === Failure analysis}(FA) plays a critical role in today's silicon debugging flow. The efficiency of FA depends on how many net values can be observed while a chip is running. If we acquire more net values, locating the failure will become easier. On the contrary,...
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ndltd-TW-099NCTU54280762016-04-08T04:22:00Z http://ndltd.ncl.edu.tw/handle/43526530218290833872 Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing 考量可偵錯式設計之版圖修正以利於進行聚焦離子束的訊號觀測與電路修正技術 Chang, Tsung-Wei 張琮偉 碩士 國立交通大學 電子研究所 99 Failure analysis}(FA) plays a critical role in today's silicon debugging flow. The efficiency of FA depends on how many net values can be observed while a chip is running. If we acquire more net values, locating the failure will become easier. On the contrary, few values of nets would result in more difficult FA. In modern techniques of FA, focus ion beam is widely used since it can directly observe net values and modify chips. These characteristics enhance the efficiency of FA. However, due to the advanced technologies, both the interval between each wire and width of wires become smaller. This phenomenon causes that observing and modifying arbitrary nets become more difficult. Thus, difficulty of FA will raise as well. To conquer this problem, we propose a methodology to modify the routing of a design in advance. In this manner, we can reach the goals: enhancing the (1)observing rate and (2)modifying rate. Our experimental results show that the improvement of observing rate reaches 50% on average and modifying rate doubled compared with the original design. Jou, Jin-Yang 周景揚 2010 學位論文 ; thesis 32 en_US |
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碩士 === 國立交通大學 === 電子研究所 === 99 === Failure analysis}(FA) plays a critical role in today's
silicon debugging flow. The efficiency of FA depends on how many net values can be observed while a chip is running. If we acquire more net values, locating the failure will become easier. On the contrary, few values of nets would result in more difficult FA. In modern techniques of FA, focus ion beam is widely used since it can directly observe net values and modify chips. These characteristics enhance the efficiency of FA. However, due to the advanced technologies, both the interval between each wire and width of wires become smaller. This phenomenon causes that observing and modifying arbitrary nets become more difficult. Thus, difficulty of FA will raise as well. To conquer this problem, we propose a methodology to modify the routing of a design in advance. In this manner, we can reach the goals: enhancing the (1)observing rate and (2)modifying rate. Our experimental results show that the improvement of observing rate reaches 50% on average and modifying rate doubled compared with the original design.
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author2 |
Jou, Jin-Yang |
author_facet |
Jou, Jin-Yang Chang, Tsung-Wei 張琮偉 |
author |
Chang, Tsung-Wei 張琮偉 |
spellingShingle |
Chang, Tsung-Wei 張琮偉 Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing |
author_sort |
Chang, Tsung-Wei |
title |
Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing |
title_short |
Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing |
title_full |
Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing |
title_fullStr |
Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing |
title_full_unstemmed |
Design-for-Debug Aware Layout Modification for FIB Net Observation and Circuit Editing |
title_sort |
design-for-debug aware layout modification for fib net observation and circuit editing |
publishDate |
2010 |
url |
http://ndltd.ncl.edu.tw/handle/43526530218290833872 |
work_keys_str_mv |
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