Hybrid Adder Designs

碩士 === 國立中央大學 === 電機工程研究所 === 99 === The thesis presents a fast 64-bit adder based on domino logics and pass transmission gates in the Brent-Kung Tree. The proposed adder uses a hybrid adder of Carry Look-Ahead and MUX architecture in 8 logic levels. Simulation results show that the proposed hybrid...

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Bibliographic Details
Main Authors: Shao-kai Chang, 張劭鍇
Other Authors: Chin-Long Wey
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/44013139392442509435