High-Performance VLSI Architecture for Full-Search Block-Matching Motion Estimation
碩士 === 國立彰化師範大學 === 電子工程學系 === 99 === In this thesis, we propose some hardware designs for the motion estimation used in video compression applications. The hardware designs use a full search block matching algorithm (FSBMA). There are two parts to the architecture of each hardware design. The first...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/94336834514765651675 |