Synthesis of Multi-bit Flip-flops for Clock Power Reduction
碩士 === 國立清華大學 === 資訊工程學系 === 99
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/96019078054374744533 |