An NoC Router Design with Built-In Self-Test and Fault Tolerance Mechanism
碩士 === 國立臺灣大學 === 電子工程學研究所 === 99 === Network-on-Chips (NoCs) is a promising interconnect architecture for in System-on-Chips (SoCs) because it exhibits better scalability than the traditional bus architecture. However, NoCs also bring new challenges to manufacturing testing one of which being the l...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/75948806508355457660 |