The Design and Verification of a Low-Power Data Cache Architecture for 32-bit Embedded Microprocessors
碩士 === 國立臺灣科技大學 === 電子工程系 === 99 === Deep submicron technology leads to the huge growth of hardware as the prediction of Moore's Law. The speed gap between processors and DRAM devices is increasingly widened along the progress of integrated circuit manufactures. To bridge such a gap, the de...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/pnk57e |