Hardware Design of High Efficiency and Non-memory AES-128/192/256 Crypto Core
碩士 === 國立聯合大學 === 電子工程學系碩士班 === 99 === This paper presents the architecture design of a high efficient and non-memory Advanced Encryption Standard (AES) crypto core to fit WPAN security requirement. The proposed basis transformation approach from Galois Field (28) to Galois Field GF(((22)2)2) ca...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/07526376264747217486 |