| Summary: | 碩士 === 國立虎尾科技大學 === 材料科學與綠色能源工程研究所 === 99 === International Technology Roadmap for Semiconductors (ITRS) indicates that the barrier thickness for Cu metallization should be reduced to 2 nm in 2016. The barrier should have low resistivity and high thermal stability when reducing the thickness, and can block Cu diffuse into Si substrate to form Cu3Si. Many studies have reported that Cu atoms usually diffuse to Si substrate through grain boundary of barrier at a high temperature; thus the device fails because of the formation of Cu3Si. Therefore the property of barrier can be improved using the amorphous barrier.
Cu thin film prepared by electroplating process is very promising to improve the step coverage. This study therefore aims to sputter deposit ultrathin amorphous Ta-Si-C barrier and Ru seed layer on Si substrate, and Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si stacked film was prepared by subsequently electroplating Cu thin film. The failure mechanism and the thermal stability were discussed thereafter. The resistance of the film was measured by a four-points probe (FPP), crystal structure was analyzed by x-ray diffraction (XRD), the surface morphology was observed by scanning electron microscope (SEM), the cross-sectional stacked film was observed by transmission electron microscopy (TEM), and the adhesion between the film and substrate was surveyed by adhesion test.
The experimental results indicated the failure temperature was 550 oC/5 min for Cu/Ru(2 nm)/Si stacked film. Ru can be a seed layer, and also can effectively block Cu diffusion. From the adhesion test, the adhesion between the film and substrate was improved greatly when adding PEG (suppressor) and urea (leveler) in electroplating solution. Cu3Si phase appeared after 700oC annealing when analyzing crystal structure of the Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si stacked film. The result showed the Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si stacked film has a failure temperature of 700 oC/5 min.
|
|---|
