Design and Implement of the Receiver Chip for VDSL
碩士 === 國立臺北科技大學 === 電機工程系所 === 99 === The main theme of this thesis is to design and implementation of the receiver chip of very high bit-rate digital subscriber line (VDSL). Recently, fiber network populated in data communication. However, it need take some time to fully implement the FTTH (fiber t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/a2pc8m |