A 12-bit 100-MS/s Zero Crossing Based Pipelined ADC With Current Mismatch Correction
碩士 === 國立中正大學 === 電機工程研究所 === 100 === This work presents a 12b 100MS/s zero-crossing-based switched-capacitor CMOS pipelined analog-to-digital converter (ADC). The proposed ADC improves the resolution, power efficiency, and sample rate of the fully differential zero-crossing-based circuits and featu...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/22210442056161344047 |