Design of S-band High Power Microwave Switch and V-band Frequency Tripler
碩士 === 長庚大學 === 電子工程學系 === 100 === A high power switch in S-band is proposed in this thesis. First the SPDT switch was designed in 2.45 GHz, S-band by use of GaN component with high carrier density (>1013 cm-2), high electron mobility (>2500 cm^(-2)/V-s) and high breakdown voltage (> 100V),...
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ndltd-TW-100CGU054280342015-10-13T21:28:02Z http://ndltd.ncl.edu.tw/handle/15800862511354594476 Design of S-band High Power Microwave Switch and V-band Frequency Tripler S頻段高功率微波開關與V頻段三倍頻器設計 Meng Hsien Chou 周孟賢 碩士 長庚大學 電子工程學系 100 A high power switch in S-band is proposed in this thesis. First the SPDT switch was designed in 2.45 GHz, S-band by use of GaN component with high carrier density (>1013 cm-2), high electron mobility (>2500 cm^(-2)/V-s) and high breakdown voltage (> 100V), and the saturation electron velocity is 1.5×〖10〗^5m/s m/s at high electric field. The transistors of switch with field-plate and multigate design in circuit, the number of gate are three in receiver and dual gate in transmitter of switch by Series-Shunt. The measurement result of receiver and transmitter from switch are insertion loss of -3.31 dB and -2.67 dB at on state; the isolation of -48.25 dB and -43.35 dB at off sate, the power capacity of circuit is 32.8 dBm and 33.05 dBm. Than the receiver and transmitter of switch was in parallel with the electrostatic discharge protection circuit. By using of its static electricity generated by pulse current directed to the protection circuit current limiting resistor way to prevent the microwave switch damage from pulse current which generating static electricity. Transmission line pulse (TLP) test switch circuit high voltage capability is 750 volts. After ESD stress, the measurement result of insertion loss was -4.06 dB and -3.52 dB at on state; the isolation was-48.25 dB and -43.35 dB at off state, the power capacity of circuit is 26.4 dBm and 26.7 dBm. Finally, design a V-band frequency tripler by WIN 0.15µm pHEMT process. Which designed voltage controlled oscillator in input stage, generate oscillation signal at 19.2 GHz. The frequency tripler by cascade which enhanced output power of third harmonic and suppressed fundamental, second harmonic by power combiner form output stage. The measurement results of output power from third harmonic is -10.51 dBm at 53.49 GHz, phase noise in 1MHz is -106.38 dBc /Hz. H. C. Chiu 邱顯欽 2012 學位論文 ; thesis 88 |
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碩士 === 長庚大學 === 電子工程學系 === 100 === A high power switch in S-band is proposed in this thesis. First the SPDT switch was designed in 2.45 GHz, S-band by use of GaN component with high carrier density (>1013 cm-2), high electron mobility (>2500 cm^(-2)/V-s) and high breakdown voltage (> 100V), and the saturation electron velocity is 1.5×〖10〗^5m/s m/s at high electric field. The transistors of switch with field-plate and multigate design in circuit, the number of gate are three in receiver and dual gate in transmitter of switch by Series-Shunt. The measurement result of receiver and transmitter from switch are insertion loss of -3.31 dB and -2.67 dB at on state; the isolation of -48.25 dB and -43.35 dB at off sate, the power capacity of circuit is 32.8 dBm and 33.05 dBm. Than the receiver and transmitter of switch was in parallel with the electrostatic discharge protection circuit. By using of its static electricity generated by pulse current directed to the protection circuit current limiting resistor way to prevent the microwave switch damage from pulse current which generating static electricity. Transmission line pulse (TLP) test switch circuit high voltage capability is 750 volts. After ESD stress, the measurement result of insertion loss was -4.06 dB and -3.52 dB at on state; the isolation was-48.25 dB and -43.35 dB at off state, the power capacity of circuit is 26.4 dBm and 26.7 dBm. Finally, design a V-band frequency tripler by WIN 0.15µm pHEMT process. Which designed voltage controlled oscillator in input stage, generate oscillation signal at 19.2 GHz. The frequency tripler by cascade which enhanced output power of third harmonic and suppressed fundamental, second harmonic by power combiner form output stage. The measurement results of output power from third harmonic is -10.51 dBm at 53.49 GHz, phase noise in 1MHz is -106.38 dBc /Hz.
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H. C. Chiu |
author_facet |
H. C. Chiu Meng Hsien Chou 周孟賢 |
author |
Meng Hsien Chou 周孟賢 |
spellingShingle |
Meng Hsien Chou 周孟賢 Design of S-band High Power Microwave Switch and V-band Frequency Tripler |
author_sort |
Meng Hsien Chou |
title |
Design of S-band High Power Microwave Switch and V-band Frequency Tripler |
title_short |
Design of S-band High Power Microwave Switch and V-band Frequency Tripler |
title_full |
Design of S-band High Power Microwave Switch and V-band Frequency Tripler |
title_fullStr |
Design of S-band High Power Microwave Switch and V-band Frequency Tripler |
title_full_unstemmed |
Design of S-band High Power Microwave Switch and V-band Frequency Tripler |
title_sort |
design of s-band high power microwave switch and v-band frequency tripler |
publishDate |
2012 |
url |
http://ndltd.ncl.edu.tw/handle/15800862511354594476 |
work_keys_str_mv |
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