4-bit 2.5-GS/s Flash ADC in 0.18μm CMOS
碩士 === 中原大學 === 電子工程研究所 === 100 === In this paper, a Flash analog-to-digital converter with an 4-bit 2.5GS/s is implemented. Design platform is TSMC 0.18μm 1P6M CMOS process. The power consumption is 59.78mW at 1.8V power supply. The simulation results demonstrate that the proposed flash ADC achieve...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/90730887991899548961 |