Design And Implementation Of 19-29 GHz CMOS Receiver Front-End And A 8 Bit Analog-To-Digital Converter
碩士 === 國立暨南國際大學 === 電機工程學系 === 100 === In this thesis, we using CMOS process to implement receiver front-end circuit, and divided into two part: a 19~29GHz Low Noise Amplifier applied to receiver system and an 8-bit Analog-to-Digital Converter simulation and implement. The first part is a 19~29...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80374876586748373284 |