The Study of Software-defined Delay-locked Loop and Its Implementation
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 100 === Delay-locked loop can do clock deskew, and it is widely applied to the synchronous circuits on various hardware systems nowadays. It can provide a stable system clock. In this paper, a software-controllable and phase-lockable platform of software-defined dela...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/42575913830382400504 |