The Investigation of Charge-Trapping Flash Nonvolatile Memory by Using Ge Diffusion into Si3N4 Trapping Layer

• Main Authors: Chang, Ting-Yu, 張廷瑜
• Other Authors: Chin, Feng-Te
• Format: Others
• Language: en_US
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/73374988888532153086

碩士 === 國立交通大學 === 電子研究所 === 100 === The rapid advancement of technology with a wide range of consumer electronics is popularity. In recent years, the requirements for memory are increasing and a variety of memory will be invented. Non-volatile flash memory are popular because of its high density, good data retention and program/erase (P/E), while widely used in various fields of electronic products, such as flash drives, mobile phones / camera memory card, many kinds of electronic product code stored ... and so on, faced with such a huge application, so the characteristics of flash memory for upgrading and improvement is an important issue. Majority of the flash memory market still use the traditional floating-gate memory type, but because of the traditional floating-gate using poly-silicon as the charge trapping layer, after the numerous program and erase operation, carriers (electrons) have moved freely in the poly-silicon, and also very easy back to the silicon substrate through the electronic defects caused by damage in the oxide layer, resulting in the loss of a lot of information, especially serious when the size scale down. And poly-silicon also cause the adjacent parasitic capacitance between the components, making the electrons move freely between each components, and thus reduce the reliability. So for data preservation (Retention) and durability (Endurance) under consideration, nitride has the characteristic of discrete charge-trap, and has the potential to replace the traditional poly-silicon. Charge trapping type consist of the following structure: poly-silicon / metal gate - oxide - silicon nitride - silicon (SONOS / MONOS), solve the problem of the traditional floating gate, and has a good charge storage capacity, low-voltage consumption, and can be embedded with complementary metal-oxide-Semiconductor FET devices (CMOS) manufacturing process, some company have begun to use charge trapping type in their production and replace the traditional floating gate type. In order to improve the characteristics of Si3N4, we used the Ge diffusion into Si3N4 trapping layer which is different from the usage of ion implantation. We let Ge diffuse into the Si3N4 and react with Si3N4 by high temperature rapid-thermal annealing (RTA). In addition, the band offset in LaAlO3/SiO2 double tunnel layers lowers tunneling barrier for faster P/E speeds and better endurance. The high-κ blocking and trapping layers lower the P/E voltage. In this study, we compare the Si3N4 and Ge/Si3N4 Charge-Trapping (CT) flash devices. We report a Ge/Si3N4 CT flash memory at a record thinnest 3.5-nm ENT trapping layer, this device has an initial 2.9 V memory window, good retention of 1.7 V extrapolated 10-year retention window at 25oC and 2.3 V endurance window at 105 cycles were measured, under fast 100 μs and low ±16 V P/E. These were achieved by using Ge diffusion the Si3N4 and reacting with Si3N4 to form the GeSi2N4 for better charge storage.