Study on the CNT-first-approach Technology of Carbon Nanotube-based Through Silicon Vias with Co-deposited Catalytic Metals for Three Dimensional Integrated Circuits
碩士 === 國立交通大學 === 電子研究所 === 100 === In recent years, the enhancement of packing density through device scaling-down became slower because the scaling down of devices have met numerous bottlenecks in practical fabrication process. Since Moore’s law could not be satisfied by device scaling-down, the c...
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/52976067969880172238 |