Clock and Data Recovery Circuit and Equalizer for High-Speed Serial-Link Receiver

碩士 === 國立交通大學 === 電子研究所 === 100 === With the advances in information technology, the demand of high speed transmission increase with each passing day. But the limitation bandwidth of the channel will causes the inter-symbol interference (ISI) when the data passes through the channel. ISI may cause w...

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Bibliographic Details
Main Authors: Wen-Chieh Huang, 黃文杰
Other Authors: Wei-Zen Chen
Format: Others
Language:zh-TW
Published: 2011
Online Access:http://ndltd.ncl.edu.tw/handle/90238237373551825752