Design and Implementation of an Energy-Efficient Programmable Vertex Processor with Ray-Tracing Acceleration
碩士 === 國立交通大學 === 多媒體工程研究所 === 100 === In this work, an energy-efficient programmable vertex processor with ray-tracing acceleration is proposed. The proposed vertex processor architecture has four features: 1) four-issue floating-point VLIW datapath; 2) multilevel pre-TnL and post-TnL vertex cache...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/79716181762820169949 |