| Summary: | 碩士 === 國立交通大學 === 平面顯示技術碩士學位學程 === 100 === This paper is discussed how to reduce the LTPS TFT process in order to
make cost down, reduce the process time and increase the production value. For this purpose, I propose the New(1) and New(2) LTPS TFT process flow, using gray tone mask to merge two PEP photo process into one and skip photo process technology . Application of these technologies can reduce 1 to 2 photo process, so it is better than normal LTPS TFT process. About the gray tone mask, we use the special property of gray tone mask. The bi-layer making photoresist remain could merge the photo process of Poly-Si and NMOS souse/drain define or PMOS NMOS souse/drain define into one. About the channel doping, we could skip the channel doping mask and skip one photo process. To adjust channel doping dosage to make the threshold voltage of NMOS and PMOS balance. Besides, under some reliability test like PGBS (Positive Gate Bias Stress), NGBS (Negative Gate Bias Stress) and GDBS (Gate and Drain Bias Stress), we can fine the LTPS TFT performance of New(1) and New(2) are similar to normal LTPS TFT process. At last, according to the experiment result, we know the technology of gray tone mask and skip photo process could reduce the array process substantially. And it also could reduce the production cost, process time and the production valve. In TFT performance, we find out that the TFT performance of gray tone mask as well as normal LTPS TFT process.
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