A Low Supply Voltage Synchronous Mirror Delay with Quadrature Phase Output
碩士 === 國立中央大學 === 電機工程研究所 === 100 === Abstract A low supply voltage synchronous mirror delay circuit with quadrature phase clock output is proposed. The coarse tune operation of this clock synchronous circuit is accomplished in five cycles, and then the fine tune operation is also accomplished in fo...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/00381876990600296379 |