Routability-Driven Placement of Analog Designs using Deferred Decision Making Technique
碩士 === 國立中央大學 === 電機工程研究所 === 100 === Due to the sensitivity of analog components, the evolution of process technologies, and the size shrink of components, post-layout electrical effects increasingly impact the circuit performance. In order to reduce the electrical effects, the layouts of most anal...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/48478478969638994407 |