The Scheduling and Timer interrupt Mechanism for PQEMU
碩士 === 國立清華大學 === 資訊工程學系 === 100 === Scheduling and timer interrupt extends PQEMU SCC to execute and supports to emulate 255 VCPUs on x86 platform. This paper strongly emphasizes while we emu-late 255 VCPUs, what problems we face. These problems lead to operating system lite then slow heavy then cra...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/06505186888733876644 |