A Memory Yield Improvement Scheme Combining Built-In Self-Repair and Error Correction Code

碩士 === 國立清華大學 === 電機工程學系 === 100 === Error correction code (ECC) and built-in self-repair (BISR) schemes have been wildly used for improving the yield and reliability of memories. Many built-in redundancy-analysis (BIRA) algorithms and ECC schemes have been reported before. However, most of them foc...

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Bibliographic Details
Main Authors: Wu, Tze-Hsin, 吳姿欣
Other Authors: Wu, Cheng-Wen
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/86809964751927355638