A 4.8~6GHz All-Digital Fractional-N Frequency Synthesizer for Software-defined Radio

碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === An all-digital phase-locked loop (ADPLL) has recently become more and more popular since it turns into an attractive alternative to a conventional analog phase-locked loop (PLL). Compared with the conventional charge-pump PLL, the advantages of an ADPLL are sma...

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Bibliographic Details
Main Authors: Tsung-Han Lee, 李宗翰
Other Authors: Shen-Iuan Liu
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/88017557779616413810