Optimal Design of a High Conductivity Solder Ball and Underfill Technology for Wafer Level Chip Scale Package
碩士 === 國立虎尾科技大學 === 光電與材料科技研究所 === 100 === The high efficiency, high power and high density have caused the development of the Wafer Level Chip Scale Package (WLCSP) to be the trend in the future. Although the input and output density of the WLCSP electronic signal can be improved, but also ca...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/wkeh5g |